China
联系人 Walton
Huangpu Road Guangzhou City, Guangzhou, Guangdong
Feature
1) 2 probe connectors
2) 4 s & 4 tracks (2 analog 2 digital)
3) A custom waveform output (including the built-in sine, square,
triangle)
4) Built-in 2M USB disk
5) Very low power consumption
Analog channel * 2 | [CH_A] [CH_B] |
Digital channel * 2 | [CH_C] [CH_D] |
Vertical Scale | *0mV**0V/div (****5 step) on x1 probe / **0mV ***0V/div (****5 step) on probe |
Vertical resolution | 8 bit |
Input coupling | AC/DC |
Max voltage | *0Vpp (x1 probe) / **0Vpp (x*0 probe) |
Storage | 4K per channel / 8K on single channel |
Software trigger type | edge, pulse, level (to be added) |
Hardware trigger type | edge |
Trigger source | CH1/CH2/EXT |
Trigger mode | Auto, Normal, Single, SCAN, None |
Test Signal generater | *0Hz to 8Mhz 2.8Vpp Square Wave, duty circle *0~*0% adjustable / *0Hz to *0Khz 2.8Vpp Sin, Square, Saw, Triangle wave |
Storage | internal 2MB USB disk, BMP, DAT file |
Auto measure | Vmax, Vmin, Vpp, Vavr, Vrms, Freq, Period, Pulse, Duty |
Cursor measurement | Level, Voltage |
Display mode | CH1, CH2, EXT, CH1+CH2, CH*-CH2, CH1*CH2 |
Sampling mode | real time |
Sampling rate | *0S/s - *2MS/s |
Power | Lipo battery |
Dimension | *8 * *0 * *4.5 (mm) |
Weight | *0g (without battery) |
Accessories within Pack | 2 mcx osilloscope probe |
Description
3" **0 × **0 widescreen color TFT LCD screen, STM*2 is the master
MCU, with the FPGA to implement the control and management of
external ADC and data cache.
At the same time to reduce the size and easy to DIY manual
welding, MCU and the FPGA are selected QFP**0 package, ADC
selected QFP*8 package.
*6M**6M sampling frequency, the use of the ADC AD******0 chip,
single-channel maximum sampling frequency of the *2M.
FIFO RAM has a maximum operating frequency of use of> **0MHz
low-power FPGA to achieve.
The AD******0 Overclocking to achieve *2M**2M sampling frequency,
so that the maximum single-channel sampling rate up to **4M.
Analog channel circuit using unity gain> **0MHz op amp, so the
actual *0MHz analog bandwidth is expected to do more.
As low power, low-cost, QFP package and other conditions of the
FPGA, storage capacity is not large, so DSO**3 sampling depth of
the current situation for the multi-channel ***6 points per
channel, single-channel work cases, ***2 points.
More & more Questions & Answer are adding……
Packing List
- ARM Digital Oscilloscope (DSO**3) (Including
Battery) x1
- Probe x2
- Mini USB Cable x1
*-Free bag X1
国家: | China |
型号: | DS203 |
离岸价格: | 150 ~ 180 / Piece ( Negotiable ) 获取最新报价 |
位置: | China |
最小订单价格: | 150 per Piece |
最小订单: | 1 Piece |
包装细节: | box |
交货时间: | 45day |
供应能力: | 100 Piece per Month |
付款方式: | Other |
產品組 : | - |