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AD7388-4

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The AD*****4/AD*****4/AD*****4 are **-bit, **-bit, and **-bit compatible, quad, simultaneous sampling, high-speed, successive approximation register (SAR), analog-to-digital converters (ADCs) operating from a 3.0 V to 3.3 V power supply with throughput rates up to 4 MSPS. The single-ended analog accepts voltage from 0 V to VREF, and is sampled and converted on the falling edge of CS.
 
The AD*****4/AD*****4/AD*****4 have on-chip oversampling blocks to improve dynamic range and reduce noise at lower bandwidths. The oversampling can boost up to two bits of added resolution. The REFIO pin can have a reference voltage (VREF) of 2.5 V to 3.3 V.
 
The conversion process and data acquisition use standard control s, allowing easy interfacing to microprocessors or digital signal processors (DSPs). The conversion result can clock out simultaneously via *-wire mode for faster throughput or via *-wire serial mode when slower throughput is allowed. The device is compatible with 1.8 V, 2.5 V, and 3.3 V interfaces using the separate logic supply.
 
The AD*****4/AD*****4/AD*****4 are available in a **-lead lead frame chip scale package (LFCSP) and operate over a temperature range of −*0°C to ***5°C

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