IS61WV102416BLL-10MLI

详情

FEATURES
• High-speed access times:
  8, *0, *0 ns
• High-performance, low-power CMOS process
• Multiple center power and ground pins for grea
noise immunity
• Easy memory expansion with CE and OE op-
tions
• CE power-down
• Fully static operation: no clock or refresh
required
• TTL compatible s and outputs
• Single power supply
VDD 1.*5V to 2.2V (IS*1WV*****6ALL)
speed = *0ns for VDD 1.*5V to 2.2V
VDD 2.4V to 3.6V (IS*1/*4WV*****6BLL)
speed = *0ns for VDD 2.4V to 3.6V
speed = 8ns for VDD 3.3V + 5%
• Packages available:
–  **-ball miniBGA  (9mm x *1mm)
–   **-pin TSOP (Type I)
• Industrial and Automotive Temperature Support
• Lead-free available
• Data control for upper and lower bytes
DESCRIPTION
The  ISSI IS*1WV*****6ALL/BLL and IS*4WV*****6BLL
are high-speed, *6M-bit static RAMs organized as ***4K
words by *6 bits. It is fabricated using  ISSI's high-perform-
ance CMOS technology. This highly reliable process coupled
with innovative circuit design techniques, yields high-perfor-
mance and low power consumption devices.
When CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down with CMOS levels.

When CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down with CMOS levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable s, CE and OE. The active LOW
Write Enable (WE) controls both writing and reading of the
memory. A data byte allows Upper Byte (UB) and Lower
Byte (LB) access.
The device is packaged in the JEDEC standard **-pin
TSOP Type I and **-pin Mini BGA (9mm x *1mm).